About

Yuta Tokusashi

  • PhD student at Keio University, Graduate School of Science and Technology.
  • English CV

Mail

  • aom at sfc.wide.ad.jp
  • tokusasi at arc.ics.keio.ac.jp
  • toku1938 at gmail.com

Education

  • In Sep 2014, he received the B.A. degree in Environmental Information from Keio University, Japan.
  • In Sep 2016, he received the M.E. degree in Engineering from Keio University, Japan.
  • From Sep 2016 to present, he is PhD candidate in Engineering from Keio University, Japan.

Employment

  • From Jun 2013 to Feb 2017, Research Assistant at IIJ Innovation Institute, Tokyo, Japan
  • From Apr 2015 to Mar 2017, Research Assistant at JST PRESTO, Yokohama, Japan
  • From Feb 2017, Visiting Student Researcher at Computer Laboratory, University of Cambridge.
  • From Apr 2017, Research Fellow of Japan Society for the Promotion of Science (JSPS Reseach Fellow (DC1)).

Projects

Publications

Journal

  • Yuta Tokusashi, Hiroki Matsutani, “Multilevel NoSQL Cache Combining In-NIC and In-Kernel Approaches”, IEEE Micro, vol.37, No.5, pp.44-51, September/October 2017.
  • Ami Hayashi, Yuta Tokusashi, Hiroki Matsutani, “A Nonparametric Online Outlier Detector for FPGA NICs”, IPSJ Journal, Vol.56, No.8 pp.1664-1679, Aug 2016.
  • Yuta Tokusashi, Hiroki Matsutani, “Design of Key-Value Store Appriance Having a Variety of Data Strcture”,IPSJ Journal, Vol.56, No.8 pp.1787-1799, Aug 2016.
  • Ami Hayashi, Yuta Tokusashi, Hiroki Matsutani, “A Line Rate Outlier Filtering FPGA NIC using 10GbE Interface”, ACM SIGARCH Computer Architecture News (CAN), Vol.43, No.4, pp.22-27, Sep 2015.
  • Yuta Tokusashi, Yohei Kuga, Takeshi Matsuya, Osamu Nakamura, “Design and Implementation of An FPGA-Based Low-Latency HDMI Video Synchronization System”, IPSJ Journal, Vol.56, No.8 pp.1593-1603, Aug 2015.

International Conference

  • Yuta Tokusashi, Yohei Kuga, Ryo Nakamura, Hajime Tazaki, Hiroki Matsutani, “mitiKV: An Inline Mitigator for DDoS Flooding Attacks”, Proc of Internet Conference 2016, Oct 2016. [Paper][Slide]
  • Yuta Tokusashi, Hiroki Matsutani, “A Multilevel NOSQL Cache Design Combining In-NIC and In-Kernel Caches”, Proc. of the 24th IEEE International Symposium on High Performance Interconnects (Hot Interconnects’16), pp.60-67, Aug 2016. [Paper] [Slide]
  • Yuta Tokusashi, Hiroki Matsutani, “NOSQL Hardware Appliance with Multiple Data Structures”, Poster Session at the 28th IEEE Symposium on High Performance Chips (Hot Chips 28), Poster session, Aug 2016.
  • Ami Hayashi, Yuta Tokusashi, Hiroki Matsutani, “A Line Rate Outlier Filtering FPGA NIC using 10GbE Interface”, Proc. of the 6th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART’15), Jun 2015. (Best Paper Award)

Domestic Conference/Workshop

  • Yuta Tokusashi, Hiroki Matsutani, “A Cache Hierarchy in Kernel and NIC for NOSQL Acceleration”. IEICE Technical Reports CPSY2015, Vol.115, No.174, pp.185-190, Aug 2015.
  • Yuta Tokusashi, Hiroki Matsutani, “A Case for Accelerating Data Structure Sever using FPGA NIC”, IEICE Technical Reports CPSY2014-162 (ETNET’15), Vol.114, No.506, pp.1-6, Mar 2015.
  • Korechika Tamura, Ami Hayashi, Yuta Tokusashi, Hiroki Matsutani, “Accelerating NOSQLs using FPGA NIC and In-Kernel Key-Value Cache”, IEICE Technical Reports CPSY2014-123, Vol.114, No.427, pp.7-12, Jan 2015.
  • Ami Hayashi, Yuta Tokusashi, Hiroki Matsutani, “An Online Outlier Detector for FPGA NICs”, IEICE Technical Reports CPSY2014-124, Vol.114, No.427, pp.13-18, Jan 2015.
  • Yuta Tokusashi, Takeshi Matsuya, Yohei Kuga, Jun Murai, “Improving the Naturalness of Internet Video Conversation using a Low-Latency Pipeline”, Proc. of Multimedia, Distributed, Cooperative and Mobile Symposium (DICOMO’13), Vol.2013, pp911-917, Jul 2013.

Public Presentation/Talk/Demonstaration

  • Yuta Tokusashi, “A Multilevel Cache Architecture for NOSQL”, NetFPGA Developer Summit 2017, University of Cambridge, Cambridge, UK, 21th Apr, 2017.
  • Yuta Tokusashi, “Hardware-based Key Value Store Design”, Interop Tokyo, Makuhari, Tokyo, Japan, Jun, 2016
  • Yuta Toksuashi, “KVSのためのFPGA NIC内HW cache、カーネル内SW cache”, FPGA Exstream 第7回, Aug 2015.
  • Yuta Tokusashi, “HDMI-TS: FPGAを用いた低遅延映像伝送システムの設計”, FPGA Exstream 第6回, Feb 2015.

Award

  • “Student Incentive Paper Award” Internet Conference 2016 (IC’16)
  • “IPSJ Specially Selected Paper” (2016)
  • “IEICE CPSY Young Presentation Award” (2015)
  • “Best Paper Award”, The 6th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART’15).
  • Digilent Design Contest 2014, World Contest, Excellent Engineering Prize
  • Digilent Design Contest 2014, Japan Region, First Prize